Source: myhdl
Section: electronics
Priority: optional
Maintainer: Steffen Moeller <moeller@debian.org>
Uploaders: Ruben Undheim <ruben.undheim@gmail.com>
Build-Depends: debhelper-compat (= 12), dh-python, python3-all, python3-setuptools
Build-Depends-Indep: python3-sphinx
Standards-Version: 4.4.0
Homepage: http://www.myhdl.org
Vcs-Git: https://salsa.debian.org/python-team/modules/myhdl.git
Vcs-Browser: https://salsa.debian.org/python-team/modules/myhdl

Package: python3-myhdl
Architecture: all
Depends: ${python3:Depends}, ${misc:Depends}
Recommends: myhdl-cosimulation
Suggests: myhdl-doc
Section: python
Description: Hardware description language for Python (Python 3)
 MyHDL turns Python into a hardware description and verification language,
 providing hardware engineers with the power of the Python ecosystem.
 .
 Python can then be used as an event-driven simulator using Python decorators
 actively to specify what corresponds to 'processes' in Verilog / VHDL and
 thereby achieve concurrency.
 .
 This package installs the library for Python 3.

Package: myhdl-cosimulation
Architecture: all
Multi-Arch: foreign
Depends: ${misc:Depends}
Description: MyHDL cosimulation files
 MyHDL turns Python into a hardware description and verification language,
 providing hardware engineers with the power of the Python ecosystem.
 .
 Python can then be used as an event-driven simulator using Python decorators
 actively to specify what corresponds to 'processes' in Verilog / VHDL and
 thereby achieve concurrency.
 .
 This package provides the sources for executable extensions of the
 core modules.

Package: myhdl-doc
Architecture: all
Multi-Arch: foreign
Section: doc
Depends: ${sphinxdoc:Depends}, ${misc:Depends}
Description: Hardware description generating framework (common documentation)
 MyHDL turns Python into a hardware description and verification language,
 providing hardware engineers with the power of the Python ecosystem.
 .
 Python can then be used as an event-driven simulator using Python decorators
 actively to specify what corresponds to 'processes' in Verilog / VHDL and
 thereby achieve concurrency.
 .
 This is the common documentation package containing HTML pages and the man
 page.
